1. Field
An aspect of the present disclosure relates generally to a semiconductor device and, more particularly, to a semiconductor device including a three-dimensional memory device and a manufacturing method thereof.
2. Description of the Related Art
A two-dimensional (2D) semiconductor device may include two-dimensionally arranged memory cells. Improvements in two-dimensional semiconductor devices for enhancing the degree of integration of memory cells have reached a plateau. For further increasing the degree of integration of memory cells in a memory device, there have been proposed three-dimensional (3D) structures for semiconductor devices, i.e., structures which arrange the memory cells in three-dimensional arrangements.
A typical three-dimensional semiconductor device includes a cell string having a three-dimensional structure. The cell string having the three-dimensional structure includes memory cells stacked over a substrate while being spaced apart from each other, and a channel layer extending along the stacking direction of the memory cells, the channel layer connecting the memory cells in series to each other. One end of the channel layer may be connected to a bit line. The bit line and the channel layer may be electrically connected to each other via a contact plug disposed therebetween. The contact plug may be formed using photolithography process.
As the size of the contact plug decreases, it is required to more precisely control the photolithography process, and therefore, manufacturing cost may increase.
After a contact plug is formed, a bit line may be disposed on the contact plug. When a plurality of bit lines is densely arranged, there may occur a manufacturing defect in that that two or more bit lines are connected to one contact plug.